Now for more details

 

The Second IEEE’s Catt, amateur and bizarre.

http://ieeexplore.ieee.org/search/searchresult.jsp?matchBoolean=true&newsearch=true&searchWithin=p_First_Names:ivor&searchWithin=p_Last_Names:catt

http://ieeexplore.ieee.org/search/searchresult.jsp?matchBoolean=true&newsearch=true&searchWithin=p_First_Names:ivor&searchWithin=p_Last_Names:catt

http://www.ivorcatt.co.uk/x54c.pdf

Catt’s Anomaly;  Massimiliano Pieraccini and Stefano Selleri

amateurs and bizarre men away from academia …. …. Ivor Catt is probably one of these [2], an engineer and amateur scientist. …. ….

Go to their [2]. I. Catt, “The Rise and Fall of Bodies of Knowledge,” The Information Scientist, 12, December 1978, pp. 137-144. http://www.ivorcatt.co.uk/x0605.htm

Catt tried to develop  his own electromagnetic theory,

 

IEEE Associate Editor Pelosi

http://www.ivorcatt.co.uk/x59v.pdf

IEEE Associate Editor Pelosi

 outside of academia and structured science”

See below; Currently, three research projects funded by the British Government [in Middlesex University, Brunel University and RSRE Malvern] to develop his computer inventions.

@@@@@@@@@@@@@@@@@

Catt's Anomaly

Massimiliano Pieraccini and Stefano Selleri (P&S)

.... “The academic word did not take Catt seriously much. “

P&S were pursuing “Publish or Perish”. Had they admitteed that academia were worried about cattq, peer review would have blocked their paper, as Pieraccini admitted in his novel .

 

What about Nobel prize winner Brian Josephson  to Sir Michael Pepper FRS, knighted for services to physics;

 

“Your [Pepper’s] and Catt’s assertion that this cannot happen (and the official IEE response also) because the electrons do not travel at the speed of light, is incorrect, as noted by Neil McEwan.

@@@@@@@@@@@@@@@@@

In the “Publish or Perish” stakes, (Pieraccini now, After Catt, has 62 peer reviewed articles – he will go far –), there is no time to check your facts. It’s quicker to check for deviation from the dogma. Catt sinned when he asked for clarification of the dogma. (Like asking what the trinity is doing in a monotheistic religion. I’m interested because I went to Trinity, Cambridge.)

http://www.ivorcatt.co.uk/x54c.pdf

http://www.ivorcatt.co.uk/x5as2.pdf

@@@@@@@@@@@@@@@@@

 

Now for the first IEEE Catt, before he was rubbished by Pieraccini, Selleri, and Associate Editor Pelosi. http://www.ivorcatt.co.uk/x54c.pdf , http://www.ivorcatt.co.uk/x59v.pdf

1, 2, 3.

1

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-13..NO. 1, 1UNE 1978 Wafer-Scale Integration—A Fault-Tolerant Procedure

RUSSELL C. AUBUSSON and IVOR CATT

Abstract—This paper considers a new approach to full-slice technology in relation to existing procedures fot achieving this goal. …. ….

0018-92OO/78/06OO-O339$OO.75 © 1978 IEEE – 205

Russell C. Aubusson was born in Liverpool, England, in November 1942. He received the B.Sc. degree in physics from Manchester Uni" - versity, Manchester, England, in 1964 and is currently working towards the Ph.D. degree at Middlesex Polytechnic, Middlesex, UK. He joined the Semiconductor Division of Ferranti Ltd. to work on RTL, DTL, ECL, and MNOS integra ted- cu it development. In 1971 he was appointed to head the company's R&D group an RF transistors, and in 1973 was made responsible for liaison with the Ministry of Defence on all Ferranti Electronic Component Division's defence contracts. He joined Middlesex Polytechnic (now Middlesex University) as a Research Fellow in 1975 to take charge of this memory project and was appointed as a Senior Lecturer in Microelectronics in September 1977.

Mr. Aubusson is a member of the Institution of Electrical Engineers.

Ivor Catt was born in Plymouth, England, on December 19,1935. He received the M.A. degree in engineering from Trinity College, Cambridge University, Cambridge, England, in 1959. From 1959 to 1962 he worked in the Ferranti (now I.C.L.) Computer Labs, Manchester, England. After working in computer peripheral companies in Los Angeles, he went to Motorola Semiconductor Products Division, Phoenix; AZ, where he pioneered the interconnection of I-ns logic gates. After a period of being in charge of the LSI Research Group at Sperry Semiconductor, Norwalk, CT, he returned to England in 1968 and worked in R & D at Computer Technology Ltd., Hemel Hempstead. More recently he has worked in R & D on radar systems at G.E.C. and telex exchange at International Telephone and Telegraph. He is presently withC.A.M. Ltd., St. Albans, Hertfordshire, UK. He has published two books: Computer Worship (London: Pitman, 1974), and The Catt Concept (New York: Putnam, 1971). Currently, three research projects funded by the British Government [in Middlesex University, Brunel University and RSRE Malvern] to develop his computer inventions are in progress or about to start. He is consulting on these, and also is writing a textbook on digital design. http://www.ivorcatt.org/digital-hardware-design.htm

 

@@@@@@@@@@@@@@

http://eprints.mdx.ac.uk/8098/1/Aubusson-phd..pdf

Catt was regularly consulted especially in the early stages.

10. Catt,I. "Improvements relating to digital integrated circuits" British Patent Specification no.1,377,859.

11. Catt,I. "Property 1A" Seminar at Imperial College, London, December 13th, 1978

P4. Aubusson,R.C. and I.Catt, "Wafer-scale intégration:  a new approach" European Solid State Circuits Conférence, Ulm University, September 20-22nd, 1977.

(SSSCIRC '77 Conférence Digest pp 76-78.)

P5 . Aubusson, R. C . and I. Catt, "Waf er-scale intégration a fault-tolerant procédure" IEEE Jnl. Solid State Circuits, vol 13, no.3, pp 339-344, June 1978.

2

http://www.ivorcatt.co.uk/x0305.htm

3

http://www.ivorcatt.co.uk/x22k1.pdf

 

@@@@@@@@@@@@@

From the IEEE website.

Catt in the IEEE journals.

http://ieeexplore.ieee.org/search/searchresult.jsp?matchBoolean=true&newsearch=true&searchWithin=p_First_Names:ivor&searchWithin=p_Last_Names:catt

 Crosstalk (Noise) in Digital Systems

Catt, Ivor

Electronic Computers, IEEE Transactions on

Year: 1967, Volume: EC-16, Issue: 6

Pages: 743 - 763, DOI: 10.1109/PGEC.1967.264721

Referenced in:

Cited by: Papers (46)

IEEE Journals & Magazines

As digital system speeds increase and their sizes diminish, it becomes increasingly important to understand the mechanism of signal crosstalk (noise) in interconnections between logic elements. The worst case is when two wires run parallel for a long distance. Past literature has been unsuccessful in explaining crosstalk between parallel wires above a ground plane, because it was assumed that only... View more

Time Loss Through Gating of Asynchronous Logic Signal Pulses

Catt, Ivor

Electronic Computers, IEEE Transactions on

Year: 1966, Volume: EC-15, Issue: 1

Pages: 108 - 111, DOI: 10.1109/PGEC.1966.264407

Referenced in:

Cited by: Papers (17)

IEEE Journals & Magazines

The gating of asynchronous signals causes logical errors. It is possible to reduce the frequency of these errors, but the price paid is a severe loss of time and extra cost in hardware. View more

The L-C oscillator circuit

Catt, Ivor

Proceedings of the IEEE

The most highly-cited general interest journal in electrical engineering and computer science, the Proceedings is the best way to stay informed on an exemplary range of topics.

[During the next 30 years, this article was ignored.

http://www.ivorcatt.co.uk/x256.pdf .

No careerist text book writer or professor

 should pay attention to this article.

 http://www.ivorcatt.co.uk/x6611.htm

This article is “science”.

   – I Catt, 2016]

Year: 1983, Volume: 71, Issue: 6

Pages: 772 - 773, DOI: 10.1109/PROC.1983.12665

Referenced in:

Cited by: Papers (1)

IEEE Journals & Magazines

The traditional differential equation approach to the circuit assumes that the components are lumped. However, work on high-speed logic has led to a new view which recognizes that the L and C are distributed in space. View more

Wafer Scale Integration: A New Approach

Aubusson, R.C.; Catt, I.

 

  

Solid State Circuits Conference, 1977. ESSCIRC '77. 3rd European

Year: 1977

Pages: 76 - 78

Referenced in:

Cited by: Papers (1)

IEEE Conference Publications

A new approach to full slice technology is described in relation to other techniques for creating multiple-chip memories. A fixed interconnection, fault-tolerant procedure capable of creating a 1 Megabit monolithic semiconductor memory is presented. View more

        Wafer-scale integration-a fault-tolerant procedure

Aubusson, R.C.; Catt, Ivor

Solid-State Circuits, IEEE Journal of

Year: 1978, Volume: 13, Issue: 3

Pages: 339 - 344, DOI: 10.1109/JSSC.1978.1051050

Referenced in:

Cited by: Papers (53) | Patents (33)

IEEE Journals & Magazines

Considers a new approach to full-slice technology in relation to existing procedures for achieving this goal. Under external control a chain of good chips is created to form a long serial memory from an array of identical chips on a full slice. Bad chips are automatically bypassed without requiring any pre- or post-programming of the metallization and without any prior knowledge of the distributio... View more

        The inductor as a transmission line

Gibson, M.S.; Catt, Ivor

Proceedings of the IEEE

Year: 1987, Volume: 75, Issue: 6

Pages: 849 - 850, DOI: 10.1109/PROC.1987.13809

Referenced in:

IEEE Journals & Magazines

Research into the interconnection of high-speed logic causes us to re-evaluate and modify the traditional view of circuit components like inductors, and to realize that they are not lumped but are distributed in space. View more

       Correction to "Maxwell's Displacement Current"

Catt, Ivor

Computers, IEEE Transactions on

Year: 1977, Volume: C-26, Issue: 11

Pages: 1180 - 1180, DOI: 10.1109/TC.1977.1674773 Actually, 20pp

Referenced in:

IEEE Journals & Magazines