Boole and computer logic

Ivor Catt,

Electronics World,

June 2004, p56.

Illogical logic

The missing logic gate

The Design of Colossus

The Making of Colossus

Ivor Catt, Electronics World, June 2004.

Letter to the Editor.

Boolean Castles in the Sand.

Come, AND, OR and NOT, our souls inspire,

and lighten us with celestial fire.
Enable with perpetual light

the dullness of our blinded sight.

- with apologies to God's double.

A typical example of the hero-worship of Boole which inhibits scepticism is at ; "1847 AD to 1854 AD George Boole Invents Boolean Algebra"

The article by Sallows, EW May04, p32, beautifully illustrates the fact that there remain serious, debilitating structural defects in the way we digital designers go about our business.

There is a missing basic function in the Boolean set, quite as important as any one of the acknowledged three, AND, OR, NOT, each taken on its own. This can be proved from first principles, as I have done. Will readers write in to say what they think it is?

I have done more logic design with discrete AND, OR and Invert gates than anyone else. I never got promoted up into paper, but continued at the logic and circuit coal face for decades. Between firings, I worked for Data Products Corp., a company which, uniquely, had this usually missing function among its available set of logic boards, along with AND, OR and Invert. In 1965, the circuit cost of the gate had just dropped to little more than that of the other three. I found that I ended up using equal amounts of AND, OR and ??? gates in my extensive designs, for reasons which became obvious. At the same time, on my course on logic design at UCLA up the road under Montgomery Pfister, who wrote the standard text book, I noticed that this function, missed by Boole, remained missing. (Actually, I went on the Pfister course to chase after another item missing from the discipline of logic design, the Glitch, which I published on later, and which is still suppressed. See IEEE Trans. Com. EC-15 No. 1, feb 1966)

[I have just remembered another fascinating detail. See “Cameo” below. 14.5.04]

I became very frustrated over the years, and prevailed on Ron Treadway to add this function to the Motorola TTL logic chips. He had just been stolen from Texas Instruments to help Motorola to catch up in TTL. We had fallen behind in the most popular (7400) family of logic gates because Narud, our head of R&D, had for years refused to allow his R&D to design any TTL, the market leader. He preferred ECL, and said he would resign if forced to develop TTL. So he resigned (or rather was fired) in the course of time after Treadway appeared. I also published an article "The ??? Element", dated February 1968, which I have in front of me. All to no avail. Lewin, who later tried to hitch a ride on my WSI bandwaggon, wrote the next standard text book. He devoted a quarter of his book to the Quine-McCluskey minterm/maxterm algorithm for "minimisation" (which is not minimal because it ignores the missing logic gate), and further entrenched the myopia. I taught the latter junk while Principal Lecturer at West Herts College. Now Sallows puts a further nail in the coffin of rationality.

In next month's EW I hope the editor will let me tell you more. I will give references at

Ivor Catt


Ivor Catt   14may04.

In Motorola we were committed to ECL. I was brought into Motorola in 1964 to address possible new problems with our ECL gates, which had a propagation delay of 1.35nsec. Previous logic, for instance the current TTL, had a propagation delay of 10nsec. Motorola crossed the threshold when the delay through a gate fell to less than the delay across the system, 6ins/nsec in an epoxy glass board.

Coming direct from Data Product Corp., I entered a community that was expert in semiconductor electronics, but admitted ignorance of digital system design, which is why they hired me. They created families in the tradition of the books on logic design, and also copied other companies’ approach. I was anxious to get them to add the ??? gate. I noticed that the bistable they had built for their ECL range could be converted into a ??? gate with only one small change in the top layer of metallisation. They refused to do this.

This bistable had a propagation delay of 3nsec. I called it the “Murray bistable” because Don Murray, my co-author, invented it. However, this was prevented because Walt Seelbach, deputy head of R&D, thought he needed to be given some of the credit. It never got a name, although I thought its design was brilliant and should be patented under Don Murray’s name.

Ivor Catt    14may04.

Displacement Current


Catt Question


Maxwell's Equations

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Moving Backwards.


TEM Wave.

The Heaviside Signal figures 4, 5.

The missing logic gate  Uploaded 23.5.04

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